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fast, rail - to- rail, low power , 2.5 v to 5.5 v, single - sup ply ttl/cmos comparator d ata sheet AD8469 rev. 0 information furnished by analog devices is believed to be accurate an d reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by i mplication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2012 analog devices, inc. all rights reserved. features qualified for automotive applications fully specified rail - to - rail at v cc = 2.5 v to 5.5 v input common - mode voltage : v ee ? 0.2 v to v cc + 0.2 v low glitch ttl - /cmos - compatible output stage 40 ns propagation delay low power : 1 .4 mw at 2.5 v shutdo wn pin programmable hysteresis power supply rejection better than ? 5 0 db ?40c to +125c operation applications high speed instrumentation clock and data signal restoration logic level shifting or translation high speed line receivers threshold detection p eak and zero - crossing detectors high speed trigger circuitry pulse - width modulators current/voltage controlled oscillators general description the AD8469 is a fast comparator fabricated on xfcb2, an analog dev ices , inc., proprietary process. this comparator i s exceptionally versatile and easy to use. features include an input range from v ee ? 0.2 v to v cc + 0.2 v, low noise, ttl - and cmos - compatible output drivers, adjustable hysteresis control, and a shutdown input. the device offers a 40 ns propagation delay driving a 15 pf load with 10 mv overdrive on 500 a typical supply current. a flexi ble power supply scheme allows the device to operate from a single +2.5 v positive supply with a ? 0.2 v to + 2.7 v input signal range up to a +5.5 v positive supply with a ?0.2 v to +5.7 v input signal range. the ttl - /cmos - compatible output stage is designe d to drive up to 15 pf with full rated timing specifications and to degrade in a graceful and linear fashion as additional capacitance is added. the input stage of the comparator offers robust protection against large input overdrive, and the outputs do no t phase reverse when the valid input signal range is exceeded. the AD8469 is available in an 8 - lead msop package and features a shutdown pin and hysteresis con trol. it is fully specified over an operating tempe rature range of ? 40c to +125c. functional block diagram v p noninverting input v n inverting input s dn input q output q output hys input 10490-001 AD8469 ttl/cmos figure 1 . www.datasheet.co.kr datasheet pdf - http://www..net/
AD8469 data sheet rev. 0 | page 2 of 12 table of contents features .............................................................................................. 1 ap plications ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 re vision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics ............................................................. 3 a bsolute maximum ratings ............................................................ 4 thermal resistance ...................................................................... 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 6 applications information .................................................................8 power/ground layout and bypassing ........................................8 ttl - /cmos - compatible output stage ....................................8 optimizing p erformance ..............................................................8 comparator propagation delay dispersion ................................8 comparator hysteresis .................................................................9 crossover bias point .....................................................................9 minimum input slew rate requirement ................................ 10 typical applications circuits ........................................................ 11 outline dimensions ....................................................................... 12 ordering guide .......................................................................... 12 automotive products ................................................................. 12 revision history 1/ 12 revision 0: initial version www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet AD8469 rev. 0 | page 3 of 12 specifications electrical character istics v cc = 2.5 v, t a = ?40c to +125c , typical value s at t a = 25c, unless otherwise noted. table 1. parameter symbol test co nditions /comments min typ max unit dc input characteristics voltage range v p , v n v cc = 2.5 v to 5.5 v ?0.2 v cc + 0.2 v common - mode range v cm v cc = 2.5 v to 5.5 v ?0.2 v cc + 0.2 v differential voltage v cc = 2.5 v to 5.5 v v cc v offset voltag e v os ?5.0 3 +5.0 mv bias current i p , i n ?0.4 +0.4 a offset current ?1.0 +1.0 a capacitance c p , c n 1 pf differential mode resistance ?0.5 v to v cc + 0.5 v 200 7000 k common - mode resistance ?0.5 v to v cc + 0.5 v 100 4000 k active gai n a v 80 db common - mode rejection ratio cmrr v cm = ?0.2 v to +2.7 v, v cc = 2.5 v 50 db v cm = ?0.2 v to +2.7 v, v cc = 5.5 v 50 db hysteresis r hys = 0.1 mv hysteresis mode and timing hysteresis mode bias voltage current = 1 a 1.145 1.25 1.35 v minimum resistor value hysteresis = 120 mv 30 120 k shutdown pin characteristics 1 input voltage high v ih comparator is operating 2.0 v cc v input voltage low v il shutdown guaranteed ?0.2 +0. 4 v input current high i ih v ih = v cc ?6 +6 a sleep time t sd l cc < 100 a 300 ns wake - up time t h v p = 10 mv, output valid 150 ns dc output characteristics v cc = 2.5 v output voltage high v oh i oh = 0.8 ma v cc ? 0.4 v output voltage low v ol i ol = 0.8 ma 0.4 v ac performance 2 rise time/fall time t r /t f 10% to 90% , v cc = 2.5 v 25 to 50 ns 10% to 90% , v cc = 5.5 v 45 to 75 ns propagation delay t pd v od = 10 mv, v cc = 2.5 v 30 to 50 ns v od = 50 mv, v cc = 5.5 v 35 to 60 ns propagation delay skew rising - to- falling transition v cc = 2.5 v 4.5 ns v cc = 5.5 v 8 ns q to q v cc = 2.5 v 3 ns v cc = 5.5 v 4 ns overdrive dispersion 10 mv < v od < 125 mv 12 ns common - mode dispersion ?0.2 v < v cm < v cc + 0.2 v 1.5 ns power supply supply voltage range v cc 2.5 5.5 v positive supply current i vcc v cc = 2.5 v 550 650 a v cc = 5.5 v 800 1100 a power dissipation p d v cc = 2.5 v 1.4 1.7 mw v cc = 5.5 v 4.5 7 mw power su pply rejection ratio psrr v cc = 2.5 v to 5.5 v ?50 db shutdown current i sd v cc = 2.5 v to 5.5 v 150 260 a 1 the output is high impedance when the device is in shutdown mode. note that this feature must be used with care because the enable/disable time is much longer than with a true tristate output . 2 v in = 100 mv square input at 1 mhz, v cm = 0 v, c l = 15 pf, v c c = 2.5 v, unless otherwise noted. www.datasheet.co.kr datasheet pdf - http://www..net/
AD8469 data sheet rev. 0 | page 4 of 12 absolute maximum rat ings table 2. parameter rating supply voltages , v cc and v ee v cc to ground ?0.5 v to +6.0 v di fferential supply voltage ? 6.0 v to +6.0 v analog input s, v p and v n input voltage ?0.5 v to v cc + 0.5 v differential input voltage ( v cc + 0.5 v) maximum input/output current 50 ma shutdown pin , s dn applied voltage (s dn to ground) ?0.5 v to v cc + 0.5 v maximum input/output current 50 ma hysteresis control pin , hys applied voltage (hys to ground) ?0.5 v to v cc + 0.5 v maximum input/output current 50 ma output current , q and q 50 ma operating temperature ambient tem perature range ?40c to +125c junction temperature 150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditio ns above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst - case conditions, that is, a device soldered in a circuit board for surface - mount packages. table 3. package type ja 1 unit 8- lead msop (rm -8) 130 c/w 1 measurement in still air. esd caution www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet AD8469 rev. 0 | page 5 of 12 pin configuration an d function descript ions AD8469 top view (not to scale) v cc 1 q 8 v p 2 q 7 v n 3 v ee 6 s dn 4 hys 5 10490-002 figure 2 . pin configuration table 4 . pin function descriptions pin o. neonic description 1 v cc positive supply voltage . 2 v p noninverting analog input. 3 v n inverting analog input. 4 s dn shut down. drive this pin low to shut down the device. 5 hys hysteresis control. bias this pin with a resistor or current source for hysteresis. 6 v ee negative supply voltage. 7 q noninverting output. in compare mode, q is at logic high if the analog voltage at the noninverting input (v p ) is greater than the analog voltage at the inverting input ( v n ) . 8 q inverting output. in compare mode, q is at logic low if the analog voltage at the noninverting input ( v p ) is greater than the analog voltage at the inverting input (v n ) . www.datasheet.co.kr datasheet pdf - http://www..net/
AD8469 data sheet rev. 0 | page 6 of 12 typical performance characteristics v cc = 2.5 v, t a = 25c, unless otherwise noted. 7 6 5 4 3 2 1 0 ? 1 h ys p i n v o l t a g e ( v ) 4 0 0 3 0 0 2 0 0 1 0 0 0 ?10 0 ?20 0 ?30 0 ?40 0 hys pin cur r e n t ( a ) v cc = 2.5v v cc = 5.5v 10490-003 figure 3 . hys pin current vs. voltage , v cc = 2.5 v and 5.5 v 3 . 5 3 . 0 2 . 5 2 . 0 1 . 5 1 . 0 0 . 5 0 ?0 . 5 ?1 . 0 5 4 3 2 1 0 ? 1 ? 2 ? 3 ? 4 ? 5 + 1 25 c ? 4 0 c + 25 c common-mode voltage (v) bias current (a) 10490-004 v cc = 2.5v figure 4 . input bias current vs. input common - mode voltage , v cc = 2.5 v 15 0 1 0 0 5 0 0 over drive ( m v ) 6 0 5 5 5 0 4 5 4 0 3 5 3 0 2 5 2 0 propagation delay ( n s ) v cc = 5.5v fall delay v cc = 2.5v rise delay v cc = 5.5v rise delay v cc = 2.5v fall delay 10490-005 figure 5 . propag ation delay vs. input overdrive, v cc = 2.5 v and 5.5 v 1 6 0 1 5 0 1 4 0 1 3 0 1 2 0 1 1 0 1 0 0 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 h y s t e r e s i s ( m v ) 130 0 1 2 0 0 110 0 100 0 90 0 8 0 0 70 0 60 0 5 0 0 40 0 30 0 20 0 10 0 0 h ys r e s i s t o r ( k) v cc = 5.5v v cc = 2.5v 10490-006 figure 6 . hysteresis vs. hys resistor , v cc = 2.5 v and 5.5 v 4 . 0 ?1 . 0 ? 0 . 5 0 0 . 5 1 . 0 1 . 5 2 . 0 2 . 5 3 . 0 3 . 5 1 . 5 1 . 0 0 . 5 0 ?0 . 5 ?1 . 0 l o ad cur r e n t ( m a ) s i n k s o urc e output voltage (v) 10490-007 figure 7 . load current vs. output voltage 0 . 5 1 . 0 1 . 5 2 . 0 2 . 5 3 . 0 38 . 0 37 . 8 37 . 6 37 . 4 37 . 2 37 . 0 36 . 8 36 . 6 36 . 4 36 . 2 36 . 0 p r o p a g a t io n d e l a y ( n s ) common-mode voltage (v) r i s e d e l a y f a l l d e l a y 10490-008 v cc = 2.5v figure 8 . propagation delay vs. input common - mode voltage , v cc = 2.5 v www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet AD8469 rev. 0 | page 7 of 12 q q 10ns/div 0.5v/div 10490-009 figure 9 . 1 mhz output voltage waveform , v cc = 2.5 v q q 10ns/div 1v/div 10490-010 figure 10 . 1 mhz output voltage waveform, v cc = 5.5 v www.datasheet.co.kr datasheet pdf - http://www..net/
AD8469 data sheet rev. 0 | page 8 of 12 applications information power/ground layout and bypassing the AD8469 comparator is a high speed device. despite the low noise output stage, it is essential to use proper high speed design techniques to achieve the specified performance. because comparators are uncompensated amplifiers, feedback in any phase relationship is likely to cause oscillations or undesired hysteresis. of critical importance is the use of low impedance supply planes, particularly the output supply plane (v cc ) and the ground plane. separate supply planes are recommended as part of a multilayer board. providing the lowest inductance return path for switching currents ensures the best possible performance in the target application. it is also important to adequately bypass the input and output supplies. place a 0.1 f bypass capacitor as close as possible to each supply pin. the capacitors should be connected to the ground plane with redundant vias placed to provide a physically short return path for output currents flowing back from ground to the v cc pin. use high frequency bypass capacitors for mini- mum inductance and effective series resistance (esr). parasitic layout inductance should also be strictly controlled to maximize the effectiveness of the bypass at high frequencies. ttl-/cmos-compatible output stage to achieve the specified propagation delay performance, keep the capacitive load at or below the specified maximum value. the outputs of the AD8469 are designed to directly drive one schottky ttl or three low power schottky ttl loads (or equivalent). for large fan outputs, buses, or transmission lines, use an appropriate buffer to maintain the excellent speed and stability of the comparator. with the rated 15 pf load capacitance applied, more than half of the total device propagation delay is output stage slew time. for this reason, the total propagation delay decreases as v cc decreases, and instability in the power supply may appear as excess delay dispersion. delay is measured to the 50% point of the supply that is in use; therefore, the fastest times are observed with the v cc supply at 2.5 v, and larger delay values are observed when driving loads that switch at other levels. overdrive and input slew rate dispersions are not significantly affected by output loading and v cc variations. a simplified schematic diagram of the ttl-/cmos-compatible output stage is shown in figure 11. because of its inherent sym- metry and generally good behavior, this output stage is readily adaptable for driving various filters and other unusual loads. output q2 q1 +in ?in output stage v logic gain stage a2 a1 a v 10490-011 figure 11. simplified schematic diagram of ttl-/cmos-compatible output stage optimizing performance as with any high speed comparator, proper design and layout techniques are essential to obtain the specified performance. stray capacitance, inductance, common power and ground impedances, or other layout issues can severely limit performance and often cause oscillation. source impedance should be minimized as much as possible. high source impedance, in combination with the parasitic input capacitance of the comparator, causes an unde- sirable degradation in bandwidth at the input, therefore degrading the overall response. higher impedances encourage undesired coupling. comparator propagatio n delay dispersion the AD8469 comparator is designed to reduce propagation delay dispersion over a wide input overdrive range of 10 mv to v cc ? 1 v. propagation delay dispersion is the variation in propagation delay that results from a change in the degree of overdrive or slew rate that is, how far or how fast the input signal exceeds the switching threshold (see figure 12 and figure 13). the propagation delay dispersion specification becomes important in high speed, time critical applications, such as data communica- tion, automatic test and measurement, and instrumentation. it is also important in event driven applications, such as pulse spectros- copy, nuclear instrumentation, and medical imaging. dispersion is the variation in propagation delay as the input overdrive conditions are changed (see figure 12). the propagation delay dispersion of the AD8469 is typically <12 ns as the overdrive varies from 10 mv to 125 mv. this specification applies to both positive and negative signals because the device has very closely matched delays for both positive-going and negative- going inputs, and very low output skews. note that for repeatable dispersion measurements the actual device offset is added to the overdrive. www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet AD8469 rev. 0 | page 9 of 12 q/q output input voltage 500mv overdrive 10mv overdrive dispersion v n v os 10490-012 figure 12 . propagation delay overdrive dispersion q/q output input voltage 10v/ns 1v/ns dispersion v n v os 10490-013 figure 13 . propagation delay slew rate disper sion comparator hysteresi s the addition of hysteresis to a comparator is often desirable in noisy environment s or when the differential input amplitudes are relatively small or slow moving. the transfer function for a comparator with hysteresis is shown i n figure 14. output input 0.0v v ol v oh +v h 2 ?v h 2 10490-014 figure 14 . comparator hysteresis transfer function as the input voltage approaches the threshold (0.0 v in figure 14 ) from below th e threshold region in a positive direction, the com - parator switches from low to high when the input crosses +v h /2. the new switching threshold becomes ?v h /2. the comparator remains in the high state until the threshold, ?v h /2, is crossed from below the threshold region in a negative direction. in this way , noise or feedback output signals centered on the 0.0 v input c annot cause the comparator to switch states unless they exceed the region bounded by v h /2. the customary technique for introducing hysteresis into a comparator uses positive feedback from the output back to the input. one limitation of this approach is that the amount o f hysteresis varies with the output logic level, resulting in hysteresis that is not symmetric about the threshold. the external feedback network can also introduce significant parasitics that reduce high speed performance and can even ind uce oscillation in some cases. t he AD8469 comparator offers a programmable hysteresis feature that significantly improves accuracy and stability. by c onnecting an external pull - down resistor or current source f rom the hys pin to ground , the user can var y the amount of hysteresis in a predictable, stable manner. leaving the hys pin disconnected or driving it high removes the hysteresis. the maximum hysteresis that can be applied using th e hys pin is approximately 160 mv. figure 15 illustrates the amount of hysteresis applied as a function of the external resistor value. 1 6 0 1 5 0 1 4 0 1 3 0 1 2 0 1 1 0 1 0 0 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 h y s t e r e s i s ( m v ) 130 0 1 2 0 0 110 0 100 0 90 0 8 0 0 70 0 60 0 5 0 0 40 0 30 0 20 0 10 0 0 h ys r e s i s t o r ( k) 10490-019 v cc = 5.5v v cc = 2.5v figure 15 . hysteresis vs. hys resistor the hys pin appears as a 1.25 v bias voltage seen thro ugh a series r esistance of 7 k 20% throughout the hysteresis control range. the advantages of applying hysteresis in this manner are improved accuracy, improved stability, reduced component count, and maximum versatility. an external bypass capacitor is not recommend ed on the hys pin because it impairs the latch function and often degrades the ji tter performance of the device. w hen the hys pin is driven low, hysteresis may become large, but in this device, the effect is not reliable or intended as a latch function. cr ossover bias point rail - to - rail inputs in both op amps and comparators have a dual front - end design. certain devices are active near the v cc rail, and others are active near the v ee rail. at some predetermined point in the common - mode range, a crossover oc curs. at th e crossover point ( normally v cc /2 ) , the direction of the bias current is reverse d and there are changes in measure d offset voltages and currents. t he AD8469 elaborates slightly on this scheme. the cr ossover points are at approximately 0.8 v and 1.6 v. www.datasheet.co.kr datasheet pdf - http://www..net/
AD8469 data sheet rev. 0 | page 10 of 12 minimum input slew r ate requirement with the rated load capacitance and normal good pcb design ( see the power/ground layout and bypassing section), the AD8469 comparator should be stable at any input slew rate with no hysteresis. broadband noise from the input stage is observed in place of the excessive chatter that is seen with most other high speed comparators. with additional capacitive loading or poor bypassing, oscillation may be encountered. these oscillations are due to the high gain bandwidth of the comparator in combination with feedback through parasitics in the package and pcb. in many applications, chatter i s not harmful. www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet AD8469 rev. 0 | page 11 of 12 typical applications circuits hys AD8469 5v 82pf 10k? 150k? 10k? 150k? control voltage 0v to 2.5v 10490-016 output figure 16 . voltage controlled oscillator AD8469 output + ? 5v 0.1f 10k ? 10k ? input v ref 0.02f hys 10490-017 figure 17 . duty cycle to differential voltage converter cmos pwm output AD8469 2.5v v ref input 1.25v input 1.25v 50mv hys adcmp601 82pf 10k ? 10k? 100k? 10k? 10490-018 figure 18 . oscillator and pulse - width modulator www.datasheet.co.kr datasheet pdf - http://www..net/
AD8469 data sheet rev. 0 | page 12 of 12 outline dimensions compliant to jedec standards mo-187-aa 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 10-07-2009-b figure 19 . 8 - lead mini small outline package [msop] (rm - 8) dimensions shown in millimeters ordering guide model 1 , 2 temperature range package description package option branding AD8469 wbrmz ?40c to +125c 8- lead mini small outline package [msop] rm -8 y4f AD8469wbrmz -r l ?40c to +125c 8- lead mini small outline package [msop] rm -8 y4f 1 z = rohs compliant part. 2 w = qualified for automotive applications. automotive products the AD8469w models are available wi th controlled manufacturing to support the quality and reliability requirements of automotive applications. note that these automotive models may have specifications that differ from the commercial models; therefore, de signers should review the specificati ons section of this data sheet carefully. only the automotive grade products shown are available for use in automotive applications. contact your local analog devices account representative for specific product ordering information a nd to obtain the specif ic automotive reliability reports for these models. ? 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d10490 - 0 - 1/12(0) www.datasheet.co.kr datasheet pdf - http://www..net/

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